A ADM7171ACPZ-1.8 circuit is set to provide DRVDD power supply for AD9650 AD converter module. And the data coming out of the AD9650 is transferred to a XIlinx FPGA core.Before the FPGA core is connected to the AD module, the output of ADM7171A keeps stable at 1.8V as designed and AD9650 operates normally. However,after we connect the FPGA core to the AD9650 circuit ,the output of ADM7171A rises to 2.5V somehow, which exceeds the absolute maximum ratings of AD9650.The voltage gets even higher towards 3.2V after FPGA is programmed. Our system has another same 1.8V output circuit design to provide 1.8V output for AVDD power supply of AD9650, which won`t rise if the FPGA is connected.
So I just can`t figure out what makes the output change into a higher voltage. The too high voltage input for AD9650 is not suitable for its long time operation