If you publish the question in English, maybe I can help with the spurs.
From my limited understanding of the translation, you are observing some spur issues at the output. You are using both PLL1 and PLL2. am I correct?
I don't recommend a filter to the output as it will degrade the performance of the output clock. You can decrease the charge pump current of PLL1 and PLL2 to reduce the spur. It may require some fine-tuning with charge pump values. You can try to change the PFD frequency of PLL1 and PLL2 to see if the spur is shifting out of the band.
Your understanding is correct. The customer found some spurs at the output and is looking for suggestions to improve the spur performance. Thank you for your suggestions.
Your understanding is correct. The customer found some spurs at the output and is looking for suggestions to improve the spur performance. Thank you for your suggestions.
