AD9166中提示HMC7044的PLL1失锁

Hi , 

  As upside setup,  HMC7044 is not locked to the 10M reference,    it divided the  2Ghz clock generated by  ADF4372 for the FPGA,  the 10M reference is ignored.  

Hi, Patrick-Xuan Thanks for your reply I use the AD9166-FMC-EBZ The Borad Clocking Schemes are shown below How can I synchronize the output of my source with the output of this board? Can you help me?

HMC7044是不是配置问题。应该是只用了fanout的功能