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AD9528 PLL1 and PLL2 unlocked

<header>
product = AD9528
softwareversion = 1.0.0.3
</header>

<detailed setup information>
-- PLL1 --
 - Ref A -
    Input Freq: 32.0 MHz
    Ra: 4
    PFD Freq: 8.0 MHz
 - Ref B -
    Powered Down
 - Clk In -
    Osc Freq: 100.0 MHz
    N1: 1
    PFD Freq: 8.0 MHz
------------------
-- PLL2 --
    Input Freq: 8.0 MHz
    R2: /12.5
    PFD Freq: 100.0 MHz
    N2: 96
    Dist Freq: 768.0 MHz
    M: 5
    VCO Freq: 3.84 GHz
----------------------
-- SysRef --
    Source: External SysRef
    Freq: 768.0 kHz
----------------------
-- Distribution --
    Input Source: PLL2
    Input Freq: 768.0 MHz
 - Out 0 -
    Input Source: D0
    D0:1
    Output Freq: 768.0 MHz
 - Out 1 -
    Input Source: D1
    D1:1
    Output Freq: 768.0 MHz
 - Out 2 -
    Input Source: D2
    D2:5
    Output Freq: 153.6 MHz
 - Out 3 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 4 -
    Input Source: D4
    D4:5
    Output Freq: 153.6 MHz
 - Out 5 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 6 -
    Input Source: D6
    D6:5
    Output Freq: 153.6 MHz
 - Out 7 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 8 -
    Input Source: D8
    D8:5
    Output Freq: 153.6 MHz
 - Out 9 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 10 -
    Input Source: D10
    D10:5
    Output Freq: 153.6 MHz
 - Out 11 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 12 -
    Input Source: PLL1
    Output Freq: 100.0 MHz
 - Out 13 -
    Input Source: PLL1
    Output Freq: 100.0 MHz
----------------------
</detailed setup information>

<registers>
Register (Hex),	Value (Hex),	Value (Dec)
0x0,		0x00,		0
0x1,		0x00,		0
0x3,		0x05,		5
0x4,		0xFF,		255
0x5,		0x00,		0
0x6,		0x03,		3
0xa,		0x00,		0
0xb,		0x00,		0
0xc,		0x56,		86
0xd,		0x04,		4
0xf,		0x00,		0
0x100,		0x04,		4
0x101,		0x00,		0
0x102,		0x01,		1
0x103,		0x00,		0
0x104,		0x01,		1
0x105,		0x00,		0
0x106,		0x0C,		12
0x107,		0x03,		3
0x108,		0x28,		40
0x109,		0x00,		0
0x10a,		0x02,		2
0x10b,		0x00,		0
0x200,		0xF3,		243
0x201,		0x38,		56
0x202,		0x23,		35
0x203,		0x10,		16
0x204,		0x05,		5
0x205,		0x00,		0
0x206,		0x00,		0
0x207,		0x19,		25
0x208,		0x5F,		95
0x209,		0x00,		0
0x300,		0x00,		0
0x301,		0x00,		0
0x302,		0x00,		0
0x303,		0x00,		0
0x304,		0x00,		0
0x305,		0x00,		0
0x306,		0x00,		0
0x307,		0x00,		0
0x308,		0x04,		4
0x309,		0x40,		64
0x30a,		0x00,		0
0x30b,		0x00,		0
0x30c,		0x00,		0
0x30d,		0x00,		0
0x30e,		0x04,		4
0x30f,		0x40,		64
0x310,		0x00,		0
0x311,		0x00,		0
0x312,		0x00,		0
0x313,		0x00,		0
0x314,		0x04,		4
0x315,		0x40,		64
0x316,		0x00,		0
0x317,		0x00,		0
0x318,		0x00,		0
0x319,		0x00,		0
0x31a,		0x04,		4
0x31b,		0x40,		64
0x31c,		0x00,		0
0x31d,		0x00,		0
0x31e,		0x00,		0
0x31f,		0x00,		0
0x320,		0x04,		4
0x321,		0x40,		64
0x322,		0x00,		0
0x323,		0x00,		0
0x324,		0x20,		32
0x325,		0x00,		0
0x326,		0x00,		0
0x327,		0x20,		32
0x328,		0x00,		0
0x329,		0x00,		0
0x32a,		0x00,		0
0x32b,		0x00,		0
0x32c,		0x00,		0
0x32d,		0x00,		0
0x32e,		0x00,		0
0x400,		0x00,		0
0x401,		0x00,		0
0x402,		0x00,		0
0x403,		0x00,		0
0x404,		0x04,		4
0x500,		0x10,		16
0x501,		0xFE,		254
0x502,		0x3F,		63
0x503,		0xFF,		255
0x504,		0xFF,		255
0x505,		0x00,		0
0x506,		0x00,		0
0x507,		0x00,		0
0x508,		0x00,		0
0x509,		0x00,		0
</registers>

<frequencies>
32000000;30720000;100000000;768000
</frequencies>

请问,以上是我的配置文件,为啥都失锁呢?

Parents
  • 您好,谢谢您的回答,我使用ADIsimCLK进行了仿真,我把仿真结果贴下面了,按照仿真结果修改硬件后还是无法锁定。而且通过仿真发现,能锁定的频率的锁定时间时us级别的,而我的这个无法锁定的,仿真的锁定时间需要7~8ms,是不是原理上就无法锁定呢?只能更换64/128/256晶振了?

Reply
  • 您好,谢谢您的回答,我使用ADIsimCLK进行了仿真,我把仿真结果贴下面了,按照仿真结果修改硬件后还是无法锁定。而且通过仿真发现,能锁定的频率的锁定时间时us级别的,而我的这个无法锁定的,仿真的锁定时间需要7~8ms,是不是原理上就无法锁定呢?只能更换64/128/256晶振了?

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