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PLL

Dear ADI engineer, hello!
I have a little question about PLL. I want to use a mixed signal as a reference signal for the PLL. Specifically, a 180MHz signal is mixed with a 30MHz signal, and the 210MHz signal obtained is input to the phase-locked loop chip HMC440 to participate in phase detection, so how much spurious signal of 180MHz needs to be suppressed in order not to interfere with phase detection, I need this data to design Bandpass filter, can you give me some suggestions?

Best wishes!

MA YuXiang

06.23

  • 您好,感谢对ADI产品的关注。

    一般使用PLL是为了生成比REF更高的频率,会使用输出信号稳定的晶振作为参考,这样倍频后的输出相噪水平才会更好。这里并没有明确提到参考的杂散要求,主要看输出能接受的信号质量。但是您可以对标相应的晶振的参数,或者在ADIsimPLL中选择自定义参考,去仿真相应的输出相噪分布。