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The adxl367 uses fifo, non-interruptible mode, and is unable to obtain a specified number of data

Thread Summary

The user is experiencing unexpected FIFO behavior with the ADXL367 in stream mode, where 513 data entries are observed instead of the expected 192 (64 samples per axis). The final answer clarifies that the FIFO_SAMPLES register should be set to 64 to trigger the watermark after 192 samples, and suggests reading from the hold register down to FIFO[385] to get the latest 128 samples. The accompanying answers confirm that the FIFO will be full with 513 values if not managed correctly, and recommend checking the overrun bit to avoid losing data.
AI Generated Content
Category: Datasheet/Specs
Product Number: adxl367

I use the FIFO of ADXL367 and set it to stream mode, hoping to save 64 sets of X, Y, and Z-axis data with a sampling frequency of 400Hz. I poll the FIFO data every 1 second (without using interrupts), but I always find 513 data entries when reading the FIFO, which is inconsistent with the manual description. How should I configure it to achieve my desired functionality?

 

this is my code 

uint16_t adx1367_get_fifo_xyz(uint16_t *buff)
{
uint8_t data_buff[512 * 2] = {0};
uint16_t fifo_entries = 0;
uint8_t reg_val[2] = {0};

adxl367_get_register_value(&reg_val[0], ADXL367_REG_STATUS, 1);
if(reg_val[0] & 1 << 2){
adxl367_get_register_value(reg_val, ADXL367_REG_FIFO_ENTRIES_L, 2);
fifo_entries = ((reg_val[1] & 0x03) << 8) | reg_val[0];
if((0 == fifo_entries)){
return 0;
}

adxl367_get_register_value(data_buff, ADXL367_REG_I2C_FIFO_DATA, fifo_entries);
fifo_entries = (fifo_entries > SAMPLE_DEFAULT_AXI_HZ*6 ? SAMPLE_DEFAULT_AXI_HZ*6:fifo_entries);
for(int index = 0; index < fifo_entries; index++){
buff[index] = (data_buff[index * 2] << 6) + (data_buff[index*2 + 1] >> 2);
}
return fifo_entries;
}

return 0;
}

void adxl367_fifo_setup(void)
{
sample_mode_info_t *p_sample = NULL;
uint8_t reg_value = 0;

p_sample = sample_config_get();

// Set fifo stream mode
adxl367_get_register_value(&reg_value, ADXL367_REG_FIFO_CONTROL, 1);
reg_value &= ~(3);
reg_value |= ADXL367_STREAM_MODE;

// Set fifo sample x,y,z
reg_value &= ~(0x0F << 3);

// set fifo sample 64/1
reg_value &= ~(1 << 2);
adxl367_set_register_value(reg_value, ADXL367_REG_FIFO_CONTROL);


// set fifo sample 64/1
reg_value = 0;
adxl367_get_register_value(&reg_value, ADXL367_REG_FIFO_SAMPLES, 1);
reg_value = p_sample->sample_axi_hz;
adxl367_set_register_value(reg_value, ADXL367_REG_FIFO_SAMPLES);
}

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