This step is caused by a known 'feature' of the ADM3055 which is unrelated to the on-chip dc-dc power supply. The first bit in the arbitration phase will have this notch or step when the transceiver has been in the recessive state for longer than approx. 25ms. The level of the notch can vary based on the amount of time in the recessive state, but the time of the notch will remain the same.
The cause of the behavior is well understood and is consistently repeatable. While this behavior isn’t desired or ideal, it also has not caused any actual functional issues or problems in practice since the reduced VOD remains large enough for the other nodes to still recognize the dominant state.
按照手册推荐电路搭建的CAN控制器电路，在系统中测试信号发现信号侦的起始位上升沿始终存在一个约140ns的台阶，而后面的数据位都没有这个台阶。是因为芯片DCDC电源驱动能力问题吗？
