ADUM4402隔离时钟出现问题

Question

设计中用ADUM4402进行隔离，在隔离一个60MHz的时钟信号时，出现严重失真。如下： 
 隔离前： 
 
 隔离后： 
 
 出现这种情况是为什么呢，希望大家帮忙看看。

ADIApproved · Accepted Answer

Hello Yangxp 
 It looks like you are using this part at Vdd=3.3V. 
 There are two issues with use of the ADuM4401 in this application. The first issue is that the digital input switching threshold for the ADuM440x is TTL, so the switch point is between 0.4V and 1.6V. It is not switching at the center of the clock signal, it is switching below Vdd/2 and this adds asymmetry to the output signal. The second issue is that the ADuM4402 is rated for 90Mbps which is equivalent to 45MHz, and you are running at 60MhZ. The data rate is beyond its specifications. 
 I would recommend changing to one of our newer devices, the ADuM242E1. This part is capable of 75MHz operation (150Mbps), it has much lower propagation delay ~7ns, it will consume far less power at 60Mhz than the part you are using. Finally, it uses CMOS input thresholds (~Vdd/2), so there should be much less distortion. 
 I am including the following Google transplantation of my comments, I hope it is good enough to he helpful. 
 Best Regards, 
 MSCantrell 
 你好Yangxp
看起来您正在以Vdd = 3.3V的电压使用该器件。
在本应用中使用ADuM4401存在两个问题。第一个问题是ADuM440x的数字输入开关阈值为TTL，因此开关点在0.4V至1.6V之间。它不在时钟信号的中心进行切换，而是在Vdd / 2以下进行切换，这会增加输出信号的不对称性。第二个问题是，ADuM4402的额定速率为90Mbps，相当于45MHz，而您的运行频率为60MhZ。数据速率超出其规格。
我建议更改为我们的较新设备之一ADuM242E1。该器件能够以75MHz的频率运行（150Mbps），传播延迟低至7ns左右，在60Mhz时将比您使用的器件消耗更少的功率。最后，它使用CMOS输入阈值（〜Vdd / 2），因此失真应小得多。)