Hi ADI_Team,
Our hardware design use 4x2 mode and it works fine. 2Lane config CKDP/DD0/DD1 and CKCP/DC0/DC1.
But now we need to use 4lanes which CKCP as 4lane Port A Clock Lane (and CKAP as 4lane Port A Clock default)
My question is how to set CKCP as 4lane clock instead CKAP.
in datasheet : CKAP(alt): D-PHY Port A Clock Lane Noninverted Output Alternate (4-Lane Mode). When CKAP/N(alt) function is enabled, CKAP/N pins drive D-PHY LP00 state.