Question:
There is a "bump" in the phase noise plots in the AD9164 data sheet (Figure 38 and 41). It looks like some filter(s) that kicks in at these frequencies. What is causing these bumps/increase of phasenoise ? Can this be improved/attenuated ?
Resolution:
That bump is from regulator power supply noise and the phase noise from the signal generator used for the DAC clock input during characterization. For information on improved phase noise performance and contributors to phase noise, please check this article in Analog Dialogue. http://www.analog.com/en/analog-dialogue/articles/analyzing-and-managing-the-impact-of-supply-noise-and-clock-jitter-on-high-speed-dac-phase-noise.html