AD7895 BUSY信号问题


  • 0
    •  Analog Employees 
    •  Super User 
    on Jul 23, 2013 10:30 AM

    您好,请首先检查您的硬件电路是否正确?供电、参考、以及BUSY, CONVST引脚是否都完好?在上电后,SCLK是什么状态?如果方便,也可以将您的原理图贴出来。

    This falling edge of CONVST also causes the BUSY signal to go high to indicate that a conversion is taking place.

    The BUSY signal goes low when the conversion is complete, which is 3.8 µs max after the falling edge of CONVST, and new data from this conversion is available in the output register of the AD7895.