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1. The clock frequency differs by 4 times, and the AD sampling frequency also differs by 4 times?

However, the AD sampling rate in the Chinese document of AD5933 does not match the English document. If it is a typo, it is recommended to correct the document.

2. Is the AD sampling frequency a 16.776/4 multiple of the external clock frequency divided by the internal div? Or is it also related to the internal clock?

3. Can the AD5934 achieve a frequency output range of 1k-100kHz? I noticed that setting the start frequency to 100kHz, the start frequency register has not reached 0xFFFFFF. So if I set the starting frequency to 500Hz or 120kHz, can DDS output the corresponding frequency, or other frequencies?

4. Although the AD5933 and AD5934 documents both say that the DDS output frequency resolution can reach 0.1Hz, we can only set the DDS output frequency resolution through the frequency increment register. Then when the minimum frequency increment code is 0x000001, whether the output frequency resolution of AD5933 and AD5934 is different by 4 times, I don't know why

[edited by: Antonius at 7:08 AM (GMT -4) on 20 Jun 2022]

1. The clock frequency differs by 4 times, and the AD sampling frequency also differs by 4 times?

However, the AD sampling rate in the Chinese document of AD5933 does not match the English document. If it is a typo, it is recommended to correct the document.

2. Is the AD sampling frequency a 16.776/4 multiple of the external clock frequency divided by the internal div? Or is it also related to the internal clock?

3. Can the AD5934 achieve a frequency output range of 1k-100kHz? I noticed that setting the start frequency to 100kHz, the start frequency register has not reached 0xFFFFFF. So if I set the starting frequency to 500Hz or 120kHz, can DDS output the corresponding frequency, or other frequencies?

4. Although the AD5933 and AD5934 documents both say that the DDS output frequency resolution can reach 0.1Hz, we can only set the DDS output frequency resolution through the frequency increment register. Then when the minimum frequency increment code is 0x000001, whether the output frequency resolution of AD5933 and AD5934 is different by 4 times, I don't know why

• 1. Yes, the sampling rate of the ADC is wrong in the chinese version of the datasheet.

2. 16.776 MHz is the frequency of the internal oscillator of AD5933. The AD5934 does not have this feature. This oscillator can be used to reduce cost or board area but it is not as precise as a quartz-based clock. If an external oscillator is used, the recommended frequency is 16 MHz. Both the DAC and the ADC operate from the same clock source with different dividers.

3. Both the AD5933 and AD5934 have a frequency output range from 1 kHz to 100 kHz. It is possible to configure a frequency outside this range but the part operates outside the specifications given in the datasheet.

4. The frequency increment is 0.03 Hz for AD5934 and 0.008 Hz for AD5933. However the phase accumulator is truncated when addressing the look-up table of the DDS, resulting in a common limitation of 0.1 Hz resolution for both chips.