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  • Hello  , 

    Thank you for your interest in AD9777.

    You can set the interpolation rate to 4x by setting register address 0x01 bits [7:6] to 10. Please refer to page 36 of the datasheet for more details on 4x interpolation and pages 18-21 for the SPI register map.

    Kind Regards, 


  • 我已经进行了寄存器的配置,实现了四倍内插,我想请教一下四倍内插可以实现数据和时钟的加倍嘛?比如说我现在AD9777芯片的输入时钟是25MHZ,经过4倍内插之后数据变成原来的四倍,时钟也变成100MHZ嘛?

  • Hello initialdream666 , 

    What configuration are you using? CLKIN can function either as input data rate clock (PLL enabled) or as a DAC data rate clock (PLL disabled).

    1. If CLKIN is configured as input data rate then  DAC data rate clock =  input data rate * interpolation.
    2. If CLKIN is configured as DAC Data rate clock then   input data rate = DAC data rate clock  / Interpolation.

    In your example, I assume 25MHz is the data rate. the  DAC data rate clock would be multiplied by interpolation (4x) = 100MHz. Your 25MHz input data would be sampled by the 100MHz DAC clock. Please refer to page 27 - 32 of the datasheet for more details. Hope this helps.

    Kind Regards,