AD9781采用FPGA作为驱动，采用200MHz时钟，FPGA数字信号给DAC输出3MHz正弦波，但DAC输出信号上叠加有时钟二次谐波信号（400MHz），请问要如果去除DAC输出信号上叠加的时钟谐波信号？
Hello,
Thank you for your interest in AD9781.
Are you using AD9783-DPG2-EBZ & EVAL-SDP-CH1Z?
If not, can you share your schematic here so we can help review?
Thanks,
Lorenz
