工程师您好！
目前项目需要将4个AD7606通过并口，并联到FPGA，请问有相关的硬件设计参考吗？
关键问题如下：
1.4个AD7606如何布局合适？
2.需要多个个参考电源ADR421，应该放置在哪？
3.4个AD7606的并行总线需要菊花链走线还是星型走线合适？是否串联匹配电阻？
盼复，感谢！
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