issue that generate arbitrary waveforms

Hi hudianshequ,

Thank you for using AD9106.

Yes, the AD9106 has four channels, so you should be able to generate three independent arbitrary waveforms of 100kHz. The device features on-chip pattern memory and a direct digital synthesizer (DDS), which allows for complex waveform generation. You can configure the waveform generator using SPI registers and load patterns into the SRAM.

You can refer on AD9106/AD9102 Low-Power DAC and Waveform Generator FAQs Q4 & Q10 for more details.

Please consider Q7 if you plan to use the SRAM of AD9106.

Thanks and kind regards,

Alex

Hi Alex

If I generate data with an arbitrary waveform of 100khz, I only need to write one cycle of data to SRAM?     

Thanks and kind regards

and then configure AD9106's regs to be cyclically generated?

Yes, typically need to write one cycle of data to SRAM for each arbitrary waveforms for same frequency.  The AD9106 can then continuously loop through this data to generate the waveform at the specified frequency. You just need to ensure that the data length corresponds to a full cycle of the waveform and that your settings properly configure the device to repeat the pattern.

The SRAM of the ad9106 is 4096 12bit, for example, one cycle of signal requires 100 data, and one data corresponds to one of the 4096 data according to datasheet?

Yes, you are correct.  Each data point corresponds to one of the 4096 memory locations within the SRAM.

Hi Alex

Thank you for your answer!

Hi Alex

1. Is the maximum output current of IOUTn 8mA? It could be converted to a voltage signal by a pull-down resistor, Is there a maximum limit for the pull-down resistor?

2. In datasheet, figure36 to figure39, LVDS driver is used. The evaluation board schematic in AD9106-ARDZ-EBZ, crystal oscillator is used for input clock, not using LVDS driver. The input clock of the ad9106 is only crystal oscillator?

Hi hudianshequ,

Please see below:

hudianshequ said:

1. Is the maximum output current of IOUTn 8mA? It could be converted to a voltage signal by a pull-down resistor, Is there a maximum limit for the pull-down resistor?

• Yes, 8mA is the maximum Full-Scale output current for VDD = 3.3V.  Please refer to table 1 of AD9106 datasheet.  
   
• For pull down/load resistor, consider the output current specifications and the voltage range to ensure proper operation.
  You can refer also to tutorial MT-019, for DAC analog output considerations. It will depend on your desired signal characteristics. 

hudianshequ said:

In datasheet, figure36 to figure39, LVDS driver is used. The evaluation board schematic in AD9106-ARDZ-EBZ, crystal oscillator is used for input clock, not using LVDS driver. The input clock of the ad9106 is only crystal oscillator?

• For AD9106-ARDZ-EBZ evaluation board, it also allows for external clocking options if a different frequency is required.  You can connect external signal source at J10 port.  For convenience of evaluation, default clock source was placed to eliminates the need for an external high-frequency clock generator, making the board easier to use.

Hi Alex

Thank you！