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Regarding the usage issues of the ADAS1000-4 in the case of 128K data output

Category: Software
Product Number: ADAS1000-4

1、The current register configuration is as follows:

      ECGCTL --> 0xE0068E   LOFFCTL --> 0x00001D  CMREFCTL --> 0xE0000A  FRMCTL --> 0x1FFE92

2、The register initialization sequence is as follows:

      CMREFCTL --> LOFFCTL --> FRMCTL --> ECTCTL
3、The issues encountered are as follows:
      1)The error bit in the header word is consistently set to 1.
      2)Data frames are being dropped: after the first read completes, the DRDY pin usually stays low instead of going high; it only goes high once the second read finishes. Consequently, subsequent reads persist for just a few hundred milliseconds, after which DRDY stops toggling low altogether.
      3)Below is the data I captured using a logic analyzer: