I encounter one problem, which is the op-amp's output has a few DC offset. I don't know how to remove it, could any one help me on this?
Above is my simulation schematic, and the simulation result is below
1. Integrator can remove the offset(more details in the attachment),
2. add a programmable bias voltage through a resistor in the sum node (KCL theory) :
Hello ALee, thanks for you reply. Is it one practical solution that a AC coupling capacitor added after the op-amp's output directly?
It's not necessary , the cap is for stability of the loop.
The integrator is used to remove the offset of the op amp.