We have some question about using AD7192
1. What's the min and max SPI SCLK frequency could support?
2. Which CPOL and CPHA (for clock polarity and phase) mode on SPI AD7192?
We view datasheet, it seems CPOL =1 and CPHA=1)
Is that right?
3. Is there any newer MCU sample code for AD7192 ?
(We have download a older version sample code from https://www.analog.com/media/cn/example-code/ADC/ExampleCode_ADC_AD7192.zip)