detect) Frequency is 10kHz, AD9552's output is 300kHz or 3MHz, then how about
the spur performance of the output?
The AD9552 loop bandwidth is 50KHz. The charge pump current is linked to the N
feedback divider division value so when the N division is changed the charge
pump current is changed by the same percentage to maintain constant bandwidth.
The PFD rate is the reference input frequency or 2x if the doubler is turned
on. If the input frequency is below 16MHz (by selecting A2:A0) the doubler
will automatically turn on.
We don’t have a guaranteed spurious spec in the tables. With a fractional PLL
with a lot of flexibility it is difficult to do this. There could be more than
one configuration that can achieve the same output frequency, often I suggest
to try them to see which gives the desired spurious performance.