For a 5‑stage cascaded LTC6953 configuration with all divide ratios set to 1 and synchronized using EZSync, what is the theoretical channel‑to‑channel skew achievable at the output of the 5th LTC6953 stage
LTC6953
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The LTC6953 is a high performance, ultralow jitter, JESD204B/C clock distribution IC. The LTC6953’s eleven outputs can be configured as up to five JESD204B...
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LTC6953 on Analog.com
For a 5‑stage cascaded LTC6953 configuration with all divide ratios set to 1 and synchronized using EZSync, what is the theoretical channel‑to‑channel skew achievable at the output of the 5th LTC6953 stage