Category: Hardware
Product Number: ADCLK846
Hi,
We are using the ADCLK846 Clock Fanout Buffer to fanout a sync signal. This is a slow one time signal, not a periodic clock signal.
The datasheet states a minimum input frequency of 0 MHz. So we assumed it would be oke to use the ADCLK846 as a non periodic signal fanout buffer. Is this assumption correct? Any idee what could be the problem? All the input levels seems to be correct.
In the picture below:
Yellow is the supply voltage,
Red is a single output (OUT0)
Green is CLK input
Blue is CLK_N input
Some times hower we do see the input reflected in the output, see below.
Any help would be appreciated,
Regards,
Marcel