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AD9513 Recommended for New Designs
The AD9513 features a three-output clock distribution IC in a design that emphasizes low jitter and phase noise to maximize data converter performance...
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AD9513 on Analog.com

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AD9513 Power-On Sync requirements

		
	
				

			

									
					    willdecook
					
							

            
            			
				
									
											
			
			
				
			
			
			    	
			                    
                
				                on Oct 16, 2024 
				
			
			
		

		
		                     
				
        		

		    
		    		    

		      		            		        
Category: Datasheet/Specs

    		        		            		    
Product Number:  AD9513  

    		        		    		    

		    		    
		    			

			    
Rev C of the AD9513 datasheet says that the input clock does not need to be present at the time that a SYNCB command is issued for output clock synchronization. Does the same apply for power-on sync? What happens if the input clock is not present until ~30ms after Vs=2.2V?

			

			
									
		                             
                        

    

                                            
                 Datasheet/Specs
                
                                                    
                 Clock Generation and Distribution
                
                                                    
                 power-on
                
                                                    
                 Clock Distribution Devices
                
                                                    
                 synchronize
                
                                        
                                            
                
                
                                        
                                            
                
                
                                        
                                            
                
                
                                        
                                            
                
                
                                
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    •  Analog Employees  
    
            
						
                            
            
            				
            
                on Oct 16, 2024 3:34 PM
            
            
						
			            		
    
		
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    Hi,
    

    I took an evaluation board and I applied a clock at CLK terminal of the board. I powered up the board and I could see the OUT2 clock.
    

    Then I shut down the board, I shut down the CLK clock. I powered up the board and, obviously, there was no output clock at OUT2. Then I turned back on CLK and OUT2 appeared. So the internal sync node that is shown in figure 18 synchronized the outputs even when there was no input clock.
    

    Petre
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
				
						
						
				
				
		
		
    
			
		
    
	
    

    

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