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AD9523-1 Recommended for New Designs
The AD9523-1 provides a low power, multi-output, clock distribution function with low jitter performance, along with an on-chip PLL and VCO with two VCO...
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AD9523-1 on Analog.com

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How to set output frequency as 156.25 MHz ?



		

			

									
					    AnandP
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Jul 16, 2024 
				
			
			
		
    

				
		
    
		    		    
		    
		    		      		            		        
    Category: Software
    
    		        		            		    
    Product Number:  AD9523-1  
    
    		        		        		        
    Software Version: AD9523 - 1 evaluation software 
    
    		    		    	
			
    I'm working on AD9523-1 evaluation software, providing REF A as 100MHz , REF B as 10 MHz and external VCXO as 100MHz. I'm trying to set the output frequency as 156.25 MHz but unable to do that.please suggest me the settings to set the output frequency as 156.25 MHz. 
    
									
			        
		
    

				
						
        

    
    Tags: 
                                            
                 Clock Generation Devices
                
                                                    
                 Clock Generation and Distribution
                
                                                    
                 software
                
                                                    
                 ad9523-1
                
                                                    
                 AD9523 - 1 evaluation software
                
                                
            
    
    
    

		
    
			
						
									
									
						
						
			
			
			
			
		
    

        
        

					
    
			
    


    


	















    
	
    
	
    
					



			








	
	
	
	



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													+1
							
			
				
									
							        
			
			
			
      •  Analog Employees  
      
            
			                            
                                                                                                                        
            
				
			
            
					
      
	
      

		
		
      
					
      Hi,
      

      

      I'm sorry to tell you, but it does not seem you'll be able to generate 156.25MHz with the AD9523-1. You can set the PLL2 VCO to 156.25E6*19=2968.75MHz, which makes the total dividing factor of the output be 19. The PLL2 VCO may be divided first by a number equal to 3, 4, or 5, which are not factors of 19.
      

      So independent of the VCXO value you choose, the AD9523-1 cannot be configured to create 156.25MHz.
      

      Take a look at the AD9528, which is very similar as architecture with the AD9523-1 and with a VCXO=100MHz, you could generate 156.25MHz clocks.
      

      See attached the stp file I created for the AD9528. I did not test it on a board, but it should function.
      

      Petre
      

      



      
    
      
        Fullscreen
        AD9528_setup.stp.txt
        Download
    
      
    
      <header>
product = AD9528
softwareversion = 1.0.0.3
</header>

<detailed setup information>
-- PLL1 --
 - Ref A -
    Input Freq: 100.0 MHz
    Ra: 10
    PFD Freq: 10.0 MHz
 - Ref B -
    Input Freq: 10.0 MHz
    Rb: 1
    PFD Freq: 10.0 MHz
 - Clk In -
    Osc Freq: 100.0 MHz
    N1: 10
    PFD Freq: 10.0 MHz
------------------
-- PLL2 --
    Input Freq: 50.0 MHz
    R2: /2
    PFD Freq: 100.0 MHz
    N2: 25
    Dist Freq: 1.25 GHz
    M: 3
    VCO Freq: 3.75 GHz
----------------------
-- SysRef --
    Source: External SysRef
    Freq: 768.0 kHz
----------------------
-- Distribution --
    Input Source: PLL2
    Input Freq: 1.25 GHz
 - Out 0 -
    Input Source: D0
    D0:8
    Output Freq: 156.25 MHz
 - Out 1 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 2 -
    Input Source: D2
    D2:5
    Output Freq: 250.0 MHz
 - Out 3 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 4 -
    Input Source: D4
    D4:5
    Output Freq: 250.0 MHz
 - Out 5 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 6 -
    Input Source: D6
    D6:5
    Output Freq: 250.0 MHz
 - Out 7 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 8 -
    Input Source: D8
    D8:5
    Output Freq: 250.0 MHz
 - Out 9 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 10 -
    Input Source: D10
    D10:5
    Output Freq: 250.0 MHz
 - Out 11 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 12 -
    Input Source: PLL1
    Output Freq: 100.0 MHz
 - Out 13 -
    Input Source: PLL1
    Output Freq: 100.0 MHz
----------------------
</detailed setup information>

<registers>
Register (Hex),	Value (Hex),	Value (Dec)
0x0,		0x00,		0
0x1,		0x00,		0
0x3,		0x05,		5
0x4,		0xFF,		255
0x5,		0x00,		0
0x6,		0x03,		3
0xa,		0x00,		0
0xb,		0x00,		0
0xc,		0x56,		86
0xd,		0x04,		4
0xf,		0x00,		0
0x100,		0x0A,		10
0x101,		0x00,		0
0x102,		0x01,		1
0x103,		0x00,		0
0x104,		0x0A,		10
0x105,		0x00,		0
0x106,		0x0C,		12
0x107,		0x03,		3
0x108,		0x18,		24
0x109,		0x04,		4
0x10a,		0x00,		0
0x10b,		0x00,		0
0x200,		0xFF,		255
0x201,		0xD2,		210
0x202,		0x03,		3
0x203,		0x10,		16
0x204,		0x03,		3
0x205,		0x00,		0
0x206,		0x00,		0
0x207,		0x02,		2
0x208,		0x18,		24
0x209,		0x00,		0
0x300,		0x00,		0
0x301,		0x00,		0
0x302,		0x07,		7
0x303,		0x40,		64
0x304,		0x00,		0
0x305,		0x00,		0
0x306,		0x00,		0
0x307,		0x00,		0
0x308,		0x04,		4
0x309,		0x40,		64
0x30a,		0x00,		0
0x30b,		0x00,		0
0x30c,		0x00,		0
0x30d,		0x00,		0
0x30e,		0x04,		4
0x30f,		0x40,		64
0x310,		0x00,		0
0x311,		0x00,		0
0x312,		0x00,		0
0x313,		0x00,		0
0x314,		0x04,		4
0x315,		0x40,		64
0x316,		0x00,		0
0x317,		0x00,		0
0x318,		0x00,		0
0x319,		0x00,		0
0x31a,		0x04,		4
0x31b,		0x40,		64
0x31c,		0x00,		0
0x31d,		0x00,		0
0x31e,		0x00,		0
0x31f,		0x00,		0
0x320,		0x04,		4
0x321,		0x40,		64
0x322,		0x00,		0
0x323,		0x00,		0
0x324,		0x20,		32
0x325,		0x00,		0
0x326,		0x00,		0
0x327,		0x20,		32
0x328,		0x00,		0
0x329,		0x00,		0
0x32a,		0x00,		0
0x32b,		0x00,		0
0x32c,		0x00,		0
0x32d,		0x00,		0
0x32e,		0x00,		0
0x400,		0x00,		0
0x401,		0x00,		0
0x402,		0x00,		0
0x403,		0x00,		0
0x404,		0x04,		4
0x500,		0x10,		16
0x501,		0x00,		0
0x502,		0x00,		0
0x503,		0xFF,		255
0x504,		0xFF,		255
0x505,		0x00,		0
0x506,		0x00,		0
0x507,		0x00,		0
0x508,		0x00,		0
0x509,		0x00,		0
</registers>

<frequencies>
100000000;10000000;100000000;768000
</frequencies>

      

      

 
      
			
      

		
			
	      

		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
				
						
						
				
				
		
		
      
			
		
      
	
      

      

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													+1
							
			
				
									
							        
			
			
			
      •  Analog Employees  
      
            
			                            
                                                                                                                        
            
				
			
            
					
      
	
      

		
		
      
					
      Hi,
      

      

      I'm sorry to tell you, but it does not seem you'll be able to generate 156.25MHz with the AD9523-1. You can set the PLL2 VCO to 156.25E6*19=2968.75MHz, which makes the total dividing factor of the output be 19. The PLL2 VCO may be divided first by a number equal to 3, 4, or 5, which are not factors of 19.
      

      So independent of the VCXO value you choose, the AD9523-1 cannot be configured to create 156.25MHz.
      

      Take a look at the AD9528, which is very similar as architecture with the AD9523-1 and with a VCXO=100MHz, you could generate 156.25MHz clocks.
      

      See attached the stp file I created for the AD9528. I did not test it on a board, but it should function.
      

      Petre
      

      



      
    
      
        Fullscreen
        AD9528_setup.stp.txt
        Download
    
      
    
      <header>
product = AD9528
softwareversion = 1.0.0.3
</header>

<detailed setup information>
-- PLL1 --
 - Ref A -
    Input Freq: 100.0 MHz
    Ra: 10
    PFD Freq: 10.0 MHz
 - Ref B -
    Input Freq: 10.0 MHz
    Rb: 1
    PFD Freq: 10.0 MHz
 - Clk In -
    Osc Freq: 100.0 MHz
    N1: 10
    PFD Freq: 10.0 MHz
------------------
-- PLL2 --
    Input Freq: 50.0 MHz
    R2: /2
    PFD Freq: 100.0 MHz
    N2: 25
    Dist Freq: 1.25 GHz
    M: 3
    VCO Freq: 3.75 GHz
----------------------
-- SysRef --
    Source: External SysRef
    Freq: 768.0 kHz
----------------------
-- Distribution --
    Input Source: PLL2
    Input Freq: 1.25 GHz
 - Out 0 -
    Input Source: D0
    D0:8
    Output Freq: 156.25 MHz
 - Out 1 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 2 -
    Input Source: D2
    D2:5
    Output Freq: 250.0 MHz
 - Out 3 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 4 -
    Input Source: D4
    D4:5
    Output Freq: 250.0 MHz
 - Out 5 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 6 -
    Input Source: D6
    D6:5
    Output Freq: 250.0 MHz
 - Out 7 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 8 -
    Input Source: D8
    D8:5
    Output Freq: 250.0 MHz
 - Out 9 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 10 -
    Input Source: D10
    D10:5
    Output Freq: 250.0 MHz
 - Out 11 -
    Input Source: Sysref
    Output Freq: 768.0 kHz
 - Out 12 -
    Input Source: PLL1
    Output Freq: 100.0 MHz
 - Out 13 -
    Input Source: PLL1
    Output Freq: 100.0 MHz
----------------------
</detailed setup information>

<registers>
Register (Hex),	Value (Hex),	Value (Dec)
0x0,		0x00,		0
0x1,		0x00,		0
0x3,		0x05,		5
0x4,		0xFF,		255
0x5,		0x00,		0
0x6,		0x03,		3
0xa,		0x00,		0
0xb,		0x00,		0
0xc,		0x56,		86
0xd,		0x04,		4
0xf,		0x00,		0
0x100,		0x0A,		10
0x101,		0x00,		0
0x102,		0x01,		1
0x103,		0x00,		0
0x104,		0x0A,		10
0x105,		0x00,		0
0x106,		0x0C,		12
0x107,		0x03,		3
0x108,		0x18,		24
0x109,		0x04,		4
0x10a,		0x00,		0
0x10b,		0x00,		0
0x200,		0xFF,		255
0x201,		0xD2,		210
0x202,		0x03,		3
0x203,		0x10,		16
0x204,		0x03,		3
0x205,		0x00,		0
0x206,		0x00,		0
0x207,		0x02,		2
0x208,		0x18,		24
0x209,		0x00,		0
0x300,		0x00,		0
0x301,		0x00,		0
0x302,		0x07,		7
0x303,		0x40,		64
0x304,		0x00,		0
0x305,		0x00,		0
0x306,		0x00,		0
0x307,		0x00,		0
0x308,		0x04,		4
0x309,		0x40,		64
0x30a,		0x00,		0
0x30b,		0x00,		0
0x30c,		0x00,		0
0x30d,		0x00,		0
0x30e,		0x04,		4
0x30f,		0x40,		64
0x310,		0x00,		0
0x311,		0x00,		0
0x312,		0x00,		0
0x313,		0x00,		0
0x314,		0x04,		4
0x315,		0x40,		64
0x316,		0x00,		0
0x317,		0x00,		0
0x318,		0x00,		0
0x319,		0x00,		0
0x31a,		0x04,		4
0x31b,		0x40,		64
0x31c,		0x00,		0
0x31d,		0x00,		0
0x31e,		0x00,		0
0x31f,		0x00,		0
0x320,		0x04,		4
0x321,		0x40,		64
0x322,		0x00,		0
0x323,		0x00,		0
0x324,		0x20,		32
0x325,		0x00,		0
0x326,		0x00,		0
0x327,		0x20,		32
0x328,		0x00,		0
0x329,		0x00,		0
0x32a,		0x00,		0
0x32b,		0x00,		0
0x32c,		0x00,		0
0x32d,		0x00,		0
0x32e,		0x00,		0
0x400,		0x00,		0
0x401,		0x00,		0
0x402,		0x00,		0
0x403,		0x00,		0
0x404,		0x04,		4
0x500,		0x10,		16
0x501,		0x00,		0
0x502,		0x00,		0
0x503,		0xFF,		255
0x504,		0xFF,		255
0x505,		0x00,		0
0x506,		0x00,		0
0x507,		0x00,		0
0x508,		0x00,		0
0x509,		0x00,		0
</registers>

<frequencies>
100000000;10000000;100000000;768000
</frequencies>

      

      

 
      
			
      

		
			
	      

		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
				
						
						
				
				
		
		
      
			
		
      
	
      

      

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