Clock synchronizer AD9547, if i am not wrong, It supposed to indicate Phase lock condition only when the phase difference between OUT and REFin is within the limits set by "phase lock threshold" (set in registers x0629,x062A).
Whether the device achieved phase lock or not, is indicated by register x0D0A (or any assigned multifunction pin).
but in my case, once the phase lock achieved (with 30nsec between REFIN and OUT), after some time, the phase difference increased about 230nSec. i programmed phase lock threshold registers to 65nSec. but still device doesn't showing as phase is in unlock state. both D0A register and multifunction telling that device is in phase lock state.
i have two doubts here. what causing the phase difference between REFIN and OUT increasing over time?
Why device doesnt showing phase unlocked despite programmed value being 65nSec? can some one clear this out.