AD9523-1 PLL1 not locking

Question

I am working on AD9523-1 customized board for both the PLLs locking, but PLL1 is not getting locked. communicating to AD9523 module is by using SPI protocol,16 bit unidirectional. 
 Configurations I was providing are using REF B with 10 MHz, PLL1 output is 100 MHz, PLL2 output is 1000 MHz. Outputs 2, 4 are using as Single-Ended positive mode. Outputs 9, 10 are using as Single- Ended negative mode, output 13 is using as differential mode. 
 For your reference I'm providing the register map file content, 
 "Addr(Hex)","Value(Bin)","Value(Hex)" "0000","10000001","81" "0002","00000000","00" "0003","00000000","00" "0004","00000000","00" "0005","00000000","00" "0006","00000000","00" "0010","00000001","01" "0011","00000000","00" "0012","00000100","04" "0013","00000000","00" "0014","00000001","01" "0015","00000000","00" "0016","00101000","28" "0017","00000000","00" "0018","00001100","0C" "0019","00011111","1F" "001A","00010010","12" "001B","00010110","16" "001C","10010000","90" "001D","00000000","00" "001E","00000000","00" "001F","00000000","00" "0020","00000000","00" "00F0","00000111","07" "00F1","10000111","87" "00F2","00010011","13" "00F3","00000010","02" "00F4","01000000","40" "00F5","00000000","00" "00F6","00000000","00" "00F7","00000001","01" "00F8","00000000","00" "00F9","00000000","00" "00FA","00000000","00" "0190","01110011","73" "0191","00001001","09" "0192","00000100","04" "0193","00100000","20" "0194","00011111","1F" "0195","00000100","04" "0196","01001000","48" "0197","00001001","09" "0198","00000000","00" "0199","01110110","76" "019A","00011111","1F" "019B","00000100","04" "019C","01001000","48" "019D","00001001","09" "019E","00000000","00" "019F","00100000","20" "01A0","00011111","1F" "01A1","00000100","04" "01A2","00100000","20" "01A3","00011111","1F" "01A4","00000100","04" "01A5","00100000","20" "01A6","00011111","1F" "01A7","00000100","04" "01A8","01100110","66" "01A9","00001001","09" "01AA","00000100","04" "01AB","01001001","49" "01AC","00001001","09" "01AD","00000000","00" "01AE","01001001","49" "01AF","00001001","09" "01B0","00000000","00" "01B1","01101000","68" "01B2","00001001","09" "01B3","00000100","04" "01B4","01101000","68" "01B5","00001001","09" "01B6","00000100","04" "01B7","01010110","56" "01B8","00001001","09" "01B9","00000000","00" "01BA","00000000","00" "01BB","00000000","00" "022C","00000000","00" "022D","00000000","00" "022E","00000000","00" "022F","00000000","00" "0230","00000000","00" "0231","00000001","01" "0232","00001101","0D" "0233","00000000","00" "0234","00000001","01" "0A00","00000000","00" "0A01","00000000","00" "0A02","00000000","00" "0A03","00000010","02" "0A04","00000000","00" "0A05","00000100","04" "0A06","00001110","0E" "0A07","00000000","00" "0A08","00010000","10" "0A09","00001110","0E" "0A0A","00000000","00" "0A0B","11110000","F0" "0A0C","00101011","2B" "0A0D","00000001","01" "0A0E","10010000","90" "0A0F","00000001","01" "0A10","00000001","01" "0A11","11100000","E0" "0A12","00000011","03" "0A13","00000010","02" "0A14","00110000","30" "0A15","10000000","80" "0A16","11111111","FF" "0B00","00000000","00" "0B01","00000000","00" "0B02","00000000","00" "0B03","00000000","00" 
 I'm trying this for a long period, I would greatly appreciate it if you could provide your feedback or response as soon as possible. 
 Thank you for your answers in advance.

pminc48 · Accepted Answer

Hi, 
 
 Exactly. You need to take the Y1 output from the good board and provide it to REFB of the second board. 
 If the second board AD9523-1 still does not work, replace the AD9523-1 with the AD9523-1 from the good board 
 Petre)

pminc48 · Answer

HI, I suppose you created this configuration with the AD9523-1 evaluation software. Please verify the attached stp file I created using the register values you gave matches what you configured: Fullscreen AD9523_1_setup.stp.txt Download ;Header contains information about the setup file and revision

Product = AD9523-1 FileVersion = 1.0 DecimalSeparator=. ;Used for internationalization

&h0,&b00000001 ;01 Hex, 001 Dec &h2,&b00000000 ;00 Hex, 000 Dec &h3,&b00000000 ;00 Hex, 000 Dec &h4,&b00000000 ;00 Hex, 000 Dec &h5,&b00000000 ;00 Hex, 000 Dec &h6,&b00000000 ;00 Hex, 000 Dec &h10,&b00000001 ;01 Hex, 001 Dec &h11,&b00000000 ;00 Hex, 000 Dec &h12,&b00000100 ;04 Hex, 004 Dec &h13,&b00000000 ;00 Hex, 000 Dec &h14,&b00000001 ;01 Hex, 001 Dec &h15,&b00000000 ;00 Hex, 000 Dec &h16,&b00101000 ;28 Hex, 040 Dec &h17,&b00000000 ;00 Hex, 000 Dec &h18,&b00001100 ;0C Hex, 012 Dec &h19,&b00011111 ;1F Hex, 031 Dec &h1A,&b00010010 ;12 Hex, 018 Dec &h1B,&b00010110 ;16 Hex, 022 Dec &h1C,&b10010000 ;90 Hex, 144 Dec &h1D,&b00000000 ;00 Hex, 000 Dec &h1E,&b00000000 ;00 Hex, 000 Dec &h1F,&b00000000 ;00 Hex, 000 Dec &h20,&b00000000 ;00 Hex, 000 Dec &hF0,&b00000111 ;07 Hex, 007 Dec &hF1,&b10000111 ;87 Hex, 135 Dec &hF2,&b00010011 ;13 Hex, 019 Dec &hF3,&b00000010 ;02 Hex, 002 Dec &hF4,&b01000000 ;40 Hex, 064 Dec &hF5,&b00000000 ;00 Hex, 000 Dec &hF6,&b00000000 ;00 Hex, 000 Dec &hF7,&b00000001 ;01 Hex, 001 Dec &hF8,&b00000000 ;00 Hex, 000 Dec &hF9,&b00000000 ;00 Hex, 000 Dec &hFA,&b00000000 ;00 Hex, 000 Dec &h190,&b01110011 ;73 Hex, 115 Dec &h191,&b00001001 ;09 Hex, 009 Dec &h192,&b00000100 ;04 Hex, 004 Dec &h193,&b00100000 ;20 Hex, 032 Dec &h194,&b00011111 ;1F Hex, 031 Dec &h195,&b00000100 ;04 Hex, 004 Dec &h196,&b01001000 ;48 Hex, 072 Dec &h197,&b00001001 ;09 Hex, 009 Dec &h198,&b00000000 ;00 Hex, 000 Dec &h199,&b01110110 ;76 Hex, 118 Dec &h19A,&b00011111 ;1F Hex, 031 Dec &h19B,&b00000100 ;04 Hex, 004 Dec &h19C,&b01001000 ;48 Hex, 072 Dec &h19D,&b00001001 ;09 Hex, 009 Dec &h19E,&b00000000 ;00 Hex, 000 Dec &h19F,&b00100000 ;20 Hex, 032 Dec &h1A0,&b00011111 ;1F Hex, 031 Dec &h1A1,&b00000100 ;04 Hex, 004 Dec &h1A2,&b00100000 ;20 Hex, 032 Dec &h1A3,&b00011111 ;1F Hex, 031 Dec &h1A4,&b00000100 ;04 Hex, 004 Dec &h1A5,&b00100000 ;20 Hex, 032 Dec &h1A6,&b00011111 ;1F Hex, 031 Dec &h1A7,&b00000100 ;04 Hex, 004 Dec &h1A8,&b01100110 ;66 Hex, 102 Dec &h1A9,&b00001001 ;09 Hex, 009 Dec &h1AA,&b00000100 ;04 Hex, 004 Dec &h1AB,&b01001001 ;49 Hex, 073 Dec &h1AC,&b00001001 ;09 Hex, 009 Dec &h1AD,&b00000000 ;00 Hex, 000 Dec &h1AE,&b01001001 ;49 Hex, 073 Dec &h1AF,&b00001001 ;09 Hex, 009 Dec &h1B0,&b00000000 ;00 Hex, 000 Dec &h1B1,&b01101000 ;68 Hex, 104 Dec &h1B2,&b00001001 ;09 Hex, 009 Dec &h1B3,&b00000100 ;04 Hex, 004 Dec &h1B4,&b01101000 ;68 Hex, 104 Dec &h1B5,&b00001001 ;09 Hex, 009 Dec &h1B6,&b00000100 ;04 Hex, 004 Dec &h1B7,&b01010110 ;56 Hex, 086 Dec &h1B8,&b00001001 ;09 Hex, 009 Dec &h1B9,&b00000000 ;00 Hex, 000 Dec &h1BA,&b00000000 ;00 Hex, 000 Dec &h1BB,&b00000000 ;00 Hex, 000 Dec &h22C,&b00000000 ;00 Hex, 000 Dec &h22D,&b00000000 ;00 Hex, 000 Dec &h22E,&b00000000 ;00 Hex, 000 Dec &h22F,&b00000000 ;00 Hex, 000 Dec &h230,&b00000000 ;00 Hex, 000 Dec &h231,&b00000001 ;01 Hex, 001 Dec &h232,&b00000000 ;00 Hex, 000 Dec &h233,&b00000000 ;00 Hex, 000 Dec &h234,&b00000001 ;01 Hex, 001 Dec &hA00,&b00000000 ;00 Hex, 000 Dec &hA01,&b00000000 ;00 Hex, 000 Dec &hA02,&b00000000 ;00 Hex, 000 Dec &hA03,&b00000010 ;02 Hex, 002 Dec &hA04,&b00000000 ;00 Hex, 000 Dec &hA05,&b00000100 ;04 Hex, 004 Dec &hA06,&b00001110 ;0E Hex, 014 Dec &hA07,&b00000000 ;00 Hex, 000 Dec &hA08,&b00010000 ;10 Hex, 016 Dec &hA09,&b00001110 ;0E Hex, 014 Dec &hA0A,&b00000000 ;00 Hex, 000 Dec &hA0B,&b11110000 ;F0 Hex, 240 Dec &hA0C,&b00101011 ;2B Hex, 043 Dec &hA0D,&b00000001 ;01 Hex, 001 Dec &hA0E,&b10010000 ;90 Hex, 144 Dec &hA0F,&b00000001 ;01 Hex, 001 Dec &hA10,&b00000001 ;01 Hex, 001 Dec &hA11,&b11100000 ;E0 Hex, 224 Dec &hA12,&b00000011 ;03 Hex, 003 Dec &hA13,&b00000010 ;02 Hex, 002 Dec &hA14,&b00110000 ;30 Hex, 048 Dec &hA15,&b10000000 ;80 Hex, 128 Dec &hA16,&b11111111 ;FF Hex, 255 Dec &hB00,&b00000000 ;00 Hex, 000 Dec &hB01,&b00000000 ;00 Hex, 000 Dec &hB02,&b00000000 ;00 Hex, 000 Dec &hB03,&b00000000 ;00 Hex, 000 Dec PortA=&h1E ;Bit0=USBStatus, Bit1=CSB, Bit2=ResetB, Bit3=SyncB, Bit4=PDB, Bit5=RefSel AutoSendUpdate=1 ;AutoIOUpdate Setting REF_A = 10.0000 REF_B = 10.0000 REF_TEST = 10.0000 VCXO = 100.0000 Comments: - the reference clock is REFB. The selection between REFA and REFB is done through the REF_SEL pin. I hope this pin is high to select REFB. - I see REFA divider is left to 1 and REFB divider is set to 4. This should be OK because you set bit 7 in register 0x1C to 1 -not clear to me why you divide REFB by 4 to make the PLL1 PFD frequency 10 Hz, when you could have left the REFB divider to 1 and reduce the PLL1 feedback divider to 10. This is not an error, just observing you could have done better. - the AD9523-1 is configured to consider REFB single ended at REFB\ pin. Make sure you provide a 100MHz, 3.3V CMOS clock at that pin. - the VCXO is set as a single entry on VCXO\ pin. Make sure you provide a 100MHz, 3.3V CMOS clock from a VCXO at that pin. Please send me the schematic of the OSC_CTRL pin connection to the VCXO. MY recommendation is to follow the approach from the AD9523-1 eval board, with a 1K.0.33uF filter on it: Also, send me the data sheet of the VCXO. - PLL2 seems to have been configured correctly, although I would have used the charge pump current set at maximum value, 892.5uA versus yours 24.5uA. But you say PLL2 locks, so it should be OK. You say PLL1 does not lock, so you should look at the following: - read register 0x22C and see the status of REFB (bit 3) and VCXO (bit 5) You need to make sure REFB is OK from AD9523-1 perspective. Petre

pminc48 · Answer

HI, 
 
 I'm sorry. I forgot to tell you to take out the txt extension before loading the stp file into the eval software. 
 Regarding the schematic you sent: It has C19 and R23 as DNI, so I really do not understand which VCXO pin is provided to the AD9523-1. 
 Then, the Crystek, CVHD-950 100MHz has a different pinout labelling than the one in your figure 
 
 I recommend putting the oscilloscope probe on the REFB\ pin where you provide the 10MHz, 3.3V CMOS clock and see if indeed, you have such a clock. The reference monitors of the AD9523-1 are not very advanced and it may be that even if the chip says the clock is OK, it may not be good enough for the PLL to lock. 
 Could you try the configuration on a different board? Maybe the AD9523-1 on this board was somehow affected by testing and is not good anymore. I doubt this, but I mention it anyway. 
 If after this you still believe the REFB is OK, I then recommend procuring an AD9523-1 evaluation board, put the Crystek VCXO in Y1 footprint of the board and do the testing for your configuration. Get it to work there and then you may debug your board. 
 Petre

pminc48 · Answer

Hi, 
 I suppose that when you say "R23 is connected to OSC_IN\", you mean R23=0ohm was populated. 
 C19 was not populated, which means CLK_IN pin is left floating. The data sheet is not clear what to do when CLK_IN pins are used in single ended mode. But when they talk about REFA or REFB clocks, they say to connect the unused pin to ground through a "suitable" capacitor, which I propose to be 100nF. Because REFA, REFB and OSC_IN pins have the same specifications, I recommend connecting the unused CLK_IN pin to ground through a 100nF capacitor. 
 I suppose that when you say " 10MHz,3.3V CMOS clock providing to REF B was observed in the oscilloscope. ". it means you put the probe on REFB\ pin and the clock had at least 2V high level, so the AD9523-1 can read it correctly. 
 " the configuration that was given to the testing AD9523-1 is given to another board. in the other board it is working,but not with the testing board . I have compared the hardware components in both the boards, same components are mounted . " 
 This means the configuration is correct and you have to look at the differences between the boards. I still recommend putting OSC_IN pin to ground through 100nF. Did you try to provide the same REFB clock to both boards? 
 Not clear to me the statement about Y1 footprint because I could not identify any Y1 component on your schematic. If you refer to the Y1 footprint on the AD9523-1 eval board, not clear what you wanted to accomplish. The FOX924B-10.000 is a TCXO and you put it in the VCXO role. So you could have used it only to look at PLL2 locking on a 10MHz. 
 
 Petre

pminc48 · Answer

HI, 
 " " you have to look at the differences between the boards",I'm unable to understand this. would you please elaborate, what are the differences I have to look at? " 
 You have two boards. On one of them, the AD9523-1 works correctly. On the other, it does not. See if there there is any difference. I recommend taking the same signal generator or clock source you used on the good board and apply it to the second board. This will tell us if the clock source on the second board is bad. 
 
 I recommended to put OSC_IN pin to ground through a 100nF capacitor. Did you do it? 
 Do you have other boards on which you can try the AD9523-1 configuration? 
 You can exchange the AD9523-1 from the bad board onto a good one and see the behavior of both. 
 
 Petre

pminc48 · Answer

Hi, 
 
 let me recapitulate: 
 - you provided to the bad board a reference clock from the good board and the AD9523-1 (let's call this ICA) still did not lock. 
 - you then changed the AD9523-1 ICA from the bad board with the one (let's call this ICB) from the good board and the AD9523-1 still did not lock. 
 -did you mount the AD9523-1 ICA on the good board in place of ICB? I'm expecting this time will lock. 
 
 To me this shows there is something else on the bad board that does not match what is on the good board. Not the reference clock, not the AD9523-1. 
 Petre

pminc48 · Answer

Hi, 
 I'm sorry, but I cannot debug your bad board having a good ADE9523-1 and still not functioning. You already have boards that are functional, so the AD9523-1 is configured correctly. I feel you should get someone from your company to help you look into this bad board and debug the circuitry around the AD9523-1. 
 Petre

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AD9523-1 PLL1 not locking