Category: Hardware
Product Number: AD9528
Hello Deferson,
This is the continued question of ez.analog.com/.../531282
Thanks for your reply.
I would like to confirm one more thing.
> However, in your case, your calculated FPGA Ref Clock is at 540MHz, it cannot set the VCO frequency to be in range. VCO frequency range starts from 3450MHz to 4025MHz and M1 (VCO RF divider) can be set to 3, 4, and 5.
I think that I can get 180MHz from channel output by the next configuration for PLL2.
VCXO = 100MHz
Doubler = Bypass
R2 divider = Bypass
PFD = 100MHz
M1 = 4
N2 feedback divider = 9
VCO frequency = 3.6GHz
Channel divider = 5
Channel output frequency = 180MHz
In this case, the VCO frequency is in the range of VCO2.
Can this configuration not be set to AD9528?
Best regards,
y_suzuki
