Category: Hardware
Product Number: HMC675LP3E
Hi,
I'm trying to build a pulse generator for very short LVDS pulses. The HMC675 has a CML output stage. However, I haven't quite understood the details since the data sheet is a bit sketchy here.
My question: can I apply a specific Vcco so that a common mode of 1.2V is achieved? A standard CML output stage would drive 4mA through a 100R termination, and so I figure
I would need to set Vcco to 1.6V. That would make the outputs LVDS compatible except that the swing would be 400mV instead of 350mV.
Or am I making a mistake? Please advise.