Category: Hardware
Product Number: AD9508
Hi,
I want to design a 1.8 [V] single CMOS output for AD9508-EP, but I see different recommendations:
- AD9508 Datasheet (Rev. G) mentions that "Series termination at the source is generally required to provide transmission line matching and/or to reduce current transients at the driver.",
with the following figure:
This design recommends adding only series resistor (typically 10 to 100 [ohm]).
- AD9508 Evaluation Board (EVAL-AD9508) designed for LVDS / HSTL differential outputs, with a note how to modify it to S.E CMOS output:
This design recommends on adding 10 [pF] coupling cap, with 100 [nF] AC-coupling cap in series to 0 [ohm] resistor.
(As I saw on previous questions, the complementary output should remain floating)
1. What is the reason for this difference?
2. Which of the options above is the recommended way to design S.E CMOS output?
Please advise.
Best regards,
Avihay.
