HI
I am planning to have clock tree structure using LTC6952(Clock +SYSREF) as source and LTC6955(1Nos for Clock and 1Nos for SYSREF) as fan out followers.
Kindly confirm if all the outputs of LTC6955 can be phase aligned.
Thanks in-advance,
Deva
Hi Deva1998
Since LTC6955 is a simple buffer, it doesn't support EZSync or ParallelSync applications. However, as the divider value is 1, the phase of the outputs will not change over time or after power up except OUT10.
You can assume the skew between channels is in the limits of the below table.
However, if you want to distribute SYSREF signal, It is important that SYSREF signals can be delayed individually according to the layout need. Therefore, I recommend using LTC6952 and LTC6953 in order to create a clocking tree.
Thanks,
Emrecan
