Programming of HMC1034 via SPI interface problem

Hello all,

To programming HMC1034 I first used Hittite USB interface and Hittite siftware.
For Fout=160 MHz and Fref=10MHz the program shows the sequence given in Note 1 below this text.
Synthezator worked properly and gave Fout=160 MHz.

Document
pll_operating_guide_rf_vcos.pdf
in section
4.18 Configuration at Start-Up
suggested writing sequense for only 6 registers.

At the end of this section document suggested the folliwing:
For detailed and most up-to-date start-up configuration of an individual part please refer to the appropriate
Register Setting Files found in the HIttite PLL Evaluation Software received with a product evaluation kit
or downloaded from www.hittite.com.

But I can not find this document or sourse code.

So, to programming HMC1034 via own SPI interface
I used the sequence compiled from the recommendations of the Data Sheet (for 6 registers)
and the sequence that the Hittite program shows (for the remaining registers).
The resulting sequence is shown in Note 2 below this text.

But the chip did not output any signal.
Output signal LD_SDO always = 0.
For WRITE operation I used timing diagramm according to Figure 24
of HMC1034 Data Sheet section
4.17.3.1 HMC Mode - Serial Port WRITE Operation.

Then I tried to read registers according to Figure 25
of HMC1034 Data Sheet section
4.17.3.2 HMC Mode - Serial Port READ Operation.
But output signal LD_SDO always = 0.

Please help me to find complete example of sequence for configuration of all HMC1034 registers.

Thank you.

Sincerely,
Viktor,
Ukraine.

Note 1
-------
// 160 MHz
REG 0 A7975
REG 1 2
REG 2 1
REG 3 120
REG 5 6910
REG 6 2003CA
REG 7 14D
REG 8 C1BEFF
REG 9 153FFF
REG A 2046
REG B 7C061
REG C 0
REG D 0
REG E 0
REG F 1
REG 10 2B
REG 11 5E
REG 12 3
REG 13 1259
REG 14 0
REG 15 0
REG 16 0
REG 17 0
REG 18 0
REG 19 0
REG 1A 0
REG 1B 0
REG 1C 0
REG 1D 0
REG 1E 0
REG 1F 0
REG 4 0
XTAL 10
DIVIDER_MANUAL_MODE 0
VCO_TO_SYNTH_DIV 1
VCO_TO_OUT_DIV 18

Note 2
-------
// Fout = 160 MHz; Fin = 10 MHz (External)
Send_code_to_Synthezator_3(0x2, 0x1); // REG2
Send_code_to_Synthezator_3(0x6, 0x2003CA); // REG6
Send_code_to_Synthezator_3(0x9, 0x153FFF); // REG9

Send_code_to_Synthezator_3(0x5, 0x60A0); // REG5
Send_code_to_Synthezator_3(0x5, 0x1628); // REG5
Send_code_to_Synthezator_3(0x5, 0x7FB0); // REG5
Send_code_to_Synthezator_3(0x5, 0x0); // REG5

Send_code_to_Synthezator_3(0x3, 0x120); // REG3
Send_code_to_Synthezator_3(0x4, 0x0); // REG4
Send_code_to_Synthezator_3(0x0, 0xA7975); // REG0
Send_code_to_Synthezator_3(0x1, 0x2); // REG1
Send_code_to_Synthezator_3(0x7, 0x14D); // REG7
Send_code_to_Synthezator_3(0x8, 0xC1BEFF); // REG8
Send_code_to_Synthezator_3(0xA, 0x2046); // REG10
Send_code_to_Synthezator_3(0xB, 0x7C061); // REG11
Send_code_to_Synthezator_3(0xC, 0x0); // REG12
Send_code_to_Synthezator_3(0xD, 0x0); // REG13
Send_code_to_Synthezator_3(0xE, 0x0); // REG14
Send_code_to_Synthezator_3(0xF, 0x1); // REG15
Send_code_to_Synthezator_3(0x10, 0x2B); // REG16
Send_code_to_Synthezator_3(0x11, 0x5E); // REG17
Send_code_to_Synthezator_3(0x12, 0x3); // REG18
Send_code_to_Synthezator_3(0x13, 0x1259); // REG19
Send_code_to_Synthezator_3(0x14, 0x0); // REG20
Send_code_to_Synthezator_3(0x15, 0x0); // REG21
Send_code_to_Synthezator_3(0x16, 0x0); // REG22
Send_code_to_Synthezator_3(0x17, 0x0); // REG23
Send_code_to_Synthezator_3(0x18, 0x0); // REG24
Send_code_to_Synthezator_3(0x19, 0x0); // REG25
Send_code_to_Synthezator_3(0x1A, 0x0); // REG26
Send_code_to_Synthezator_3(0x1B, 0x0); // REG27
Send_code_to_Synthezator_3(0x1C, 0x0); // REG27
Send_code_to_Synthezator_3(0x1D, 0x0); // REG29
Send_code_to_Synthezator_3(0x1E, 0x0); // REG30
Send_code_to_Synthezator_3(0x1F, 0x0); // REG31