I'm currently playing about with the AD9577 and have come across some unexpected behaviour.
Does anybody know if there are any sequencing requirements on the clock outputs of the AD9577? I've run into a problem where I'm unable to utilise outputs 1 and 3 if I've disabled outputs 0 and 2 respectively. If I leave the lower numbered output of the respective VCO disabled then I appear to be able to enable / disable the respective output and set the voltage standard however it doesn't clock it just sits at a constant level. The moment I enable the lower numbered output, even if it isn't driving anything, the whole thing comes to life.
I haven't explicitly set the sync bits and according to the datasheet these should default to off.
Does anybody know what's going on? is this a undocumented feature of the chip? or simply something I haven't come across in the datasheet?