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Does HMC7044 support JESD-204C for ADC/DAC clock generation?

Category: Datasheet/Specs
Product Number: HMC7044

Dear Support,

    I would like to use the HMC7044 to generate the JESD-204C clocks for AD9082 and FPGA synchronization.  The HMC7044 datasheet says that the device supports JESD204B, but no mention of the JESD-204C standard.  Can the device support the latter, and what aspect of a clock controller chip would qualify it for one or the other?  Please advise.

    Thanks!

Benjamin

Top Replies

  • FormerMember
    FormerMember
+2 verified

Hello,

Both JESD204C and B require an external SYSREF pulse (or clock) for deterministic latency or multichip synchronization.  The HMC7044 can provide this signal along with ability to delay this signal…

  • FormerMember
    +1 FormerMember

Hello,

Both JESD204C and B require an external SYSREF pulse (or clock) for deterministic latency or multichip synchronization.  The HMC7044 can provide this signal along with ability to delay this signal (as well as any clock signal) to compensate for any mismatch in PCB delay lengths when synchronizing multiple devices where both the SYSREF and CLK of each device need to arrive at the same time at each device while meeting set-up/hold times.

Regards

  • Dear PMH,

      Thanks for the explanation.

    Benjamin