Hello support team,
As per datasheet, figure 31 , it is possible to directly interface the single ended external clock to CLK1 by interfacing CLK1B to GND through cap.
But in the eval board reference schematic, 1:1 RF transformer is being used?
My external clock is 2 VP-P , 100 MHz , 50 ohm. Is it possible for me to directly interface the external clock to CLK1 pin as per figure 31. although there is a requirement to reduce slight voltage from 2 VP-P to 1.8 V, which I am planning to reduce it through cap. divider, or should I use 1:1 RF transformer?