Post Go back to editing

AD9542 REFBB Offset Limit Question

Category: Hardware
Product Number: AD9542, AD9545


I have an external 10,000 Hz reference signal connected to REFBB on an AD9542 but I'm having trouble getting it non-fault lock.

The reference signal has a nominal tolerance of 600 ppm which I interpret as the signal can be anywhere from 9,994 to 10,006 Hz.

According to my calculations, I think this yields a delta p of 599640 ppb [from the formula -600E-6/(1+600E-6)*1E9= -599640.2159]

This is what is programmed into the ΔTOL register for REFBB [0x092658].


In my current rig, the actual reference input is measured at 10,003 Hz (and it's not easy for me to change this) and I can not get a valid reference lock: REFBB status (0x3008) only ever reports 'fast' and 'fault'. The register is working as it reports 'los' (and sometimes both fast and slow) when the signal is removed.

I believe that the 52 MHz chip reference oscillator is good as I am able to synthesize a 10,000.00 Hz signal on the outputs.

Any suggestions greatly appreciated.



  • Further, I set the nominal reference register to 10,010 Hz. However, REFBB monitor still reported a fast fault for a 10,003 Hz input signal.

    So, I set nominal to 20,000 Hz in an attempt to force the monitor to report slow - it reported both fast and slow simultaneously.

    I am confused.

  • Hi,

    600ppm error in frequency translates to roughly 600 ppm error in period, as you found out. I recommend to use the eval software to introduce all this data and not try to configure the chip by deciding yourself the registers to be initialized. Just click on REFBB settings, introduce 600 000 ppb for Offset Tolerance and then click on Apply Changes. You then may check in the memory map that the registers 0x046E, 0x046D, 0x046C had the right values: 0x09, 0x27, 0xC0.

    By the way, I recommend increasing that limit to more in the beginning, just to get REFBB considered as valid. Then you can reduce the value to the one you target.

    If the chip reports the clock as being fast, it has usually a higher frequency than expected, so you should increase the offset tolerance.

    Fast and slow indication happens when there is no signal at the pin.

    I recommend starting with a clock from a signal generator. Then you can switch to a clock obtained by other means.


  • Hi,

    Because the frequency is very low, you need to apply the clock in dc coupled mode, 1.2V CMOS or 1.8V CMOS. Do you do this and do you set the REFBB appropriately?

    Do you use the eval board or a board you designed?


  • Hi Petre,

    Yes, REFBB has been configured as DC 1.8V singled-ended. REFBB is being driven by a 3.3V to 1.8V SN74AUP1T34DCK level converter which, in turn, is driven by a 3.3V CPU generating a 10kHz pulse stream.

    We now think that the problem is due to some very high frequency parasites on the 3.3V signal line which we are urgently investigating (this is our theory - the monitor reported valid when we 'accidentally' put a 50ohm load on the CPU output which may be squashing the noise). 

    Parasitic noise would explain why the Reference Monitor always reports 'fast'.

    I will let you know what I find.



  • It turned out to be ground bounce - this has been solved and the Reference Monitor reports Valid.

    Problem solved