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AD9517-3 Phase difference between output clock and refclk is variable when restart AD9517-3?

Category: Datasheet/Specs
Product Number: AD9517-3ABCPZ

AD9517-3 use external reference clock,the clock is 20M Hz,VCO is set to 1.92G,the frequency division is 16,the Output target frequency is 120M Hz。The Phase-locked marking is right。But the phase difference between  output clock(120M) and refclk(20M) is variable when restart AD9517-3。And  reset AD9517-3 by AD9517-3_pin17_nRESET, the phase difference is larger than power off and restart the module。The question: is it right the uncertain phase difference,What is the range of variation? I need the variable < 0.05ns。