Hello there,
I would like to know if when I am setting this configuration all outputs are being configurated with the same phase.
(0x100,0x04); // PLL0 Sync bit HIGH
(0x200,0x04); // PLL1 Sync bit HIGH
(0x00F,0x01); // I/O Update
(0x100,0x00); // PLL0 Sync bit LOW
(0x200,0x00); // PLL1 Sync bit LOW
(0x00F,0x01); // I/O Update
Regards,
Juan Camilo Peña