Post Go back to editing

ADF4360 Phase Noise Spec

Category: Hardware
Product Number: ADF4360

Hi, I am currently using the ADF4360-9 to generate an LO ref in the range 146-152 MHz. My phase noise requirements are quite strict so have ended up running the VCO at double this and using the Divout f/2 output to get a slight improvement in noise performance. Am curious if there are any other synthesizer ICs with integrated VCOs that offer slightly better phase noise performance? Or would a topology with an external VCO be a better strategy to minimize phase noise? Also are there any designs which use an external varactor diode to reduce noise?

Many thanks in advance,

Dave

Parents
  • Hi Dave,

    We have various PLL with integrated VCO parts in our portfolio. Correct part selection depends on operating frequency and phase noise / integrated jitter requirement. If you can specify these, I can help to find best fit for your application. ADF4351, ADF4356, ADF4355 are the alternatives at first glance. 

    Kudret

  • Thanks for the reply Kudret. My operating frequency range is ~155 - 165 MHz. Our channel BW is 25 kHz, and we have a requirement for -70dBc at adjacent channels, which equates to -70-(20log[25])=-114 dBc/Hz phase noise spec. The ADF4360-9 almost meets this spec with PFD frequency of 100kHz, by doubling the VCO frequency and using the DivOut port with a divide by 2. So my questions are:

    1. Is there a better choice of PLL synth for the above application?

    2. Do you recommend using a divide by 4/8 rather than 2 at the Divout port, would this theoretically further reduce phase noise by 3/6 dB?

    3. Is there anything to be gained in using an external varactor in the VCO, since the integrated varactor contributes noise to the VCO?

    Many Thanks,

    Dave

Reply
  • Thanks for the reply Kudret. My operating frequency range is ~155 - 165 MHz. Our channel BW is 25 kHz, and we have a requirement for -70dBc at adjacent channels, which equates to -70-(20log[25])=-114 dBc/Hz phase noise spec. The ADF4360-9 almost meets this spec with PFD frequency of 100kHz, by doubling the VCO frequency and using the DivOut port with a divide by 2. So my questions are:

    1. Is there a better choice of PLL synth for the above application?

    2. Do you recommend using a divide by 4/8 rather than 2 at the Divout port, would this theoretically further reduce phase noise by 3/6 dB?

    3. Is there anything to be gained in using an external varactor in the VCO, since the integrated varactor contributes noise to the VCO?

    Many Thanks,

    Dave

Children