The current application scenario is that the refaa of ad9545 inputs 1PPS signal, the outputs of pll0 and PLL1 track 1PPS signal, and OCXO crystal oscillator is connected to M0 pin for clock compensation. OCXO's accuracy is 10 ppb.
The current problem is that the locking status of the clocks pll0 and PLL1 is unstable. When pll0 is unstable, read the status of the 0x3100 register with a value of 0x2a, indicating that the frequency of dpll0 is not locked. Read the status of the refaa of 0x3006 with a value of 0x10, indicating that the refaa is valid. When PLL1 locking is unstable, read the status of 0x3200 register, the value is 0x2c, indicating that the phase of dpll1 is not locked. Read the status of 0x3006 refaa, which is 0x10, indicating that refaa is valid.
Please help to see where there may be problems. The attachment is the current configuration file. Thank you for your support!