I am implementing a HMC7044 clock tree consisting of a primary HMC7044 and a secondary HMC7044. The secondary HMC7044 will be used in clock fanout mode. SYSCLK and SYSREF from the primary HMC7044 will be passed to the FIN and RFSYNCIN of the secondary HMC7044.
To achieve phase synchronous sampling, the synchronisation is performed using single SYNC pulses that are passed from one of the primary HMC7044 SCLKOUT outputs to a secondary HMC7044 RFSYNCIN input. Because single pulses are used, it imposes the following constraint:
- Both the primary HMC7044 SCLKOUT output and the secondary HMC7044 RFSYNCIN input MUST be DC coupled.
I only have a single ended 50R connection between the primary HMC7044 SCLKOUT output and the secondary HMC7044 RFSYNCIN input. This is because they are located far apart (in separate systems) and only a single 50R coax cable connection between them. This imposes the next constraint:
- The HMC7044 SCLKOUT output must be a single ended output and the HMC7044 RFSYNCIN input must be a single ended input.
Now the typical HMC7044 recommended input for a single ended signal is as follows:
If I remove the top AC coupling capacitor (+input), I make it a DC coupled input. However, this is still not going to work. In the long period between pulses, the bottom input (-input) is effectively going to drift towards the top input (+input) and there will no longer be a suitable voltage differential on the input buffer.
This is the on-chip termination network for the HMC7044:
Is it possible to configure the HMC7044 so that it does not have any parallel termination (50, 100 or 1k)? I could then use a resistor divider on the -input to define a mid-point voltage. The input pulse could then be applied to the +input.
If that is not possible, is it safe to apply a DC voltage (from a power supply) to the -input to define a mid point voltage at say 1.8V? Then I can connect the single ended DC coupled signal from the primary HMC7044 to the +input.
Do you have any recommendations for an alternate termination scheme on the RFSYNCIN input of the secondary HMC7044 so that it can be:
- Single ended input
- DC coupled
- Support pulse generator mode synchronisation where there are big time gaps between pulses and the input must still remain valid during these 'off' periods
In terms of the primary HMC7044 SCLKOUT output, I was planning on configuring it for LVPECL output and using the following termination to create a single ended signal with a 2V common mode voltage:
Please let me know if you can recommend an alternate way of connecting the primary HMC7044 output to the secondary HMC7044 RFSYNCIN input.