Feasibility of double input Reference on LTC6954

Hi,

I would caution against this approach, unless you fully understand the LVCMOS output behavior and characteristics.

- Are the LVCMOS output devices turned off or just muted?  Muting an output can still result in -30 to -40dBc output levels, which may cause unexpected results with the larger input signal.

- how much noise is produced by the LVCMOS signal when off?

-What sort of impedance does the LVCMOS create when off?

For other devices we recommend a CMOS termination scheme as follows

Basically, you will need to consider the max current drive capability of the CMOS output, and the min/max input amplitude swing available at the LTC6954 input, and if their is long transmission line you will want 50 ohm end termination.

Chris

Hi Chris,

thank you for your ans.

Below my reply to your questions:

Q: Are the LVCMOS output devices turned off or just muted? 

A: Turned off

Q: how much noise is produced by the LVCMOS signal when off?

A: I don't know, I will investigate this.

Q: What sort of impedance does the LVCMOS create when off?

A: The impedance is forced to 50 Ohm when the LVCMOS source is off.

Moreover, atteched the oscilloscope trace of one of the Reference source. This Reference signal comes form a different board through a coaxial 50Ohm cable. Could you comment on the quality of this Reference signal for the LTC6954?

The reference signal looks like it has fast edges and enough amplitude to work very well with the LTC6954.  

Thank you again Chris.

Let me know if I understand correctly:

• It is possible to connect CMOS reference source either to the IN+ or the IN- input pin of the LTC6954, connecting to unused input pin to Ground trough a 50 Ohm resistor.
  The scheme reported in the figure below (Fig. 2 datasheet) could be suited also to drive the IN- input pin with a reference CMOS signal.

• In this way two different CMOS reference sources can be adopted if the unused source is off and shows a 50 Ohm impedance.
• Care should be taken in considering the amount of noise is produced by the LVCMOS reference source when it is off.

The ref oscillator in figure 2 is assumed to be sine wave oscillator that is designed to drive 50 ohms.  I am confused by the following

- What are the CMOS levels when its not loaded?  Is it 3.3V CMOS, 1.8V CMOS, etc.  Your picture shows a smaller CMOS level.   The reason I'm asking is typically CMOS outputs can not drive 50 ohms directly and will need a schematic like I provided above wtih a series resistor.

- I've never seen a CMOS source that creates a 50 ohm impedance when turned off.

- What do you mean by the CMOS source is off.  Does that mean the device is active, but the CMOS output is tri-stated?  Or that power has been removed from the CMOS device.  Or is the device in some power down state? 

In general from the LTC6954 point of view what your are describing is possible.  Typically, when supplying two different inputs to the LTC6954 a switch is used to provide isolation.  So I'm asking several questions to understand the setup, to make sure it makes sense.

The ref oscillator in figure 2 is assumed to be sine wave oscillator that is designed to drive 50 ohms.  I am confused by the following

- What are the CMOS levels when its not loaded?  Is it 3.3V CMOS, 1.8V CMOS, etc.  Your picture shows a smaller CMOS level.   The reason I'm asking is typically CMOS outputs can not drive 50 ohms directly and will need a schematic like I provided above wtih a series resistor.

- I've never seen a CMOS source that creates a 50 ohm impedance when turned off.

- What do you mean by the CMOS source is off.  Does that mean the device is active, but the CMOS output is tri-stated?  Or that power has been removed from the CMOS device.  Or is the device in some power down state? 

In general from the LTC6954 point of view what your are describing is possible.  Typically, when supplying two different inputs to the LTC6954 a switch is used to provide isolation.  So I'm asking several questions to understand the setup, to make sure it makes sense.

Hi Chris

- What are the CMOS levels when its not loaded?  Is it 3.3V CMOS, 1.8V CMOS, etc.  Your picture shows a smaller CMOS level.   The reason I'm asking is typically CMOS outputs can not drive 50 ohms directly and will need a schematic like I provided above wtih a series resistor.

The design specs involve two different Reference sources:
INTERNAL reference: coming from an OCXO, LVCMOS 0-3V.
EXTERNAL reference: coming from an external board by means of a coaxial cable, has the profile reported in the post on Mar 8, 2022 9:51 AM. EXT-reference is a single ended 50 Ohm signal, not really a CMOS signal.
The two reference sources are NEVER available simultaneously.

- I've never seen a CMOS source that creates a 50 ohm impedance when turned off.

The impedance is forced by mounting dedicated component on the board to ensure the 50 Ohm. No need of hot switching.

- What do you mean by the CMOS source is off.  Does that mean the device is active, but the CMOS output is tri-stated?  Or that power has been removed from the CMOS device.  Or is the device in some power down state? 

In case of INTERNAL reference, the source is powered down, the OCXO output is physically disconnected and the LTC6954 IN+ pin, is 50 Ohm terminated.
In case of EXTERNAL reference, the coaxial cable is disconnected, and the LTC6954 IN- pin is 50 Ohm terminated.

Moreover, I made a mistake reporting datasheet fig. 2, you are right: this interface is for sinewave, not CMMOS source. Sorry for that!

The point is identify a possible solution in order to alternatively connect two different reference sources to the LT6954 avoiding the use of a switch component.

What you are describing, makes sense and will work .  Thanks for answering all the questions.