Post Go back to editing

HMC7043 output sysref phase difference

We use the single HMC7043 to generate DCLK and SYSREF,when we are at -40 degrees Celsius,We found that sometimes when power on star up,SYSREF will not  boot to boot.

Our clock frequency is 245.76MHz, and the sysref frequency is 960kHz .When sysref not boot to boot,the difference is an integer multiple of 245.76MHz.

What could be the reason for this problem? And how to do with this problem.

when not boot to boot oscilloscope 

Our register configuration below

hmc7043 

0x0000,0x00,
0x0001,0x02,  
0x0002,0x00,
0x0003,0x04,  
0x0004,0x7F,
0x0006,0x00,
0x000A,0x00,  
0x000B,0x07,  
0x0046,0x00,
0x0050,0x0F,  
0x0054,0x03,
0x005A,0x07,  
0x005B,0x00,  
0x005C,0x80,  
0x005D,0x02,  
0x0064,0x01,  
0x0065,0x00,
0x0071,0x16,                
0x00A0,0xDF,


0x00C8,0xF3,  //DCLK
0x00C9,0x01,
0x00CA,0x00,
0x00CB,0x00,
0x00CC,0x00,
0x00CD,0x00,
0x00CE,0x00,
0x00CF,0x03,
0x00D0,0x01,  

0x00D2,0xFD,   //sysref
0x00D3,0x00,    
0x00D4,0x01,    
0x00D5,0x00,
0x00D6,0x00,
0x00D7,0x00,
0x00D8,0x00,
0x00D9,0x00,
0x00DA,0x30,

0x00DC,0xF3,  //DCLK
0x00DD,0x01,
0x00DE,0x00,
0x00DF,0x00,
0x00E0,0x00,
0x00E1,0x00,
0x00E2,0x00,
0x00E3,0x03,
0x00E4,0x01,

0x00E6,0xFD,   //sysref
0x00E7,0x00,    
0x00E8,0x01,    
0x00E9,0x00,
0x00EA,0x00,
0x00EB,0x00,
0x00EC,0x00,
0x00ED,0x00,
0x00EE,0x10,   

0x00F0,0xF3,  //DCLK
0x00F1,0x01,
0x00F2,0x00,
0x00F3,0x00,
0x00F4,0x00,
0x00F5,0x00,
0x00F6,0x00,
0x00F7,0x03,
0x00F8,0x01,

0x00FA,0xFD,   //sysref
0x00FB,0x00,        
0x00FC,0x01,        
0x00FD,0x00,
0x00FE,0x00,
0x00FF,0x00,
0x0100,0x00,
0x0101,0x00,
0x0102,0x10,   

0x0104,0xF3,  //DCLK
0x0105,0x01,
0x0106,0x00,
0x0107,0x00,
0x0108,0x00,
0x0109,0x00,
0x010A,0x00,
0x010B,0x03,
0x010C,0x01,

0x010E,0xFD,   //sysref
0x010F,0x00,        
0x0110,0x01,        
0x0111,0x00,
0x0112,0x00,
0x0113,0x00,
0x0114,0x00,
0x0115,0x00,
0x0116,0x10,   

0x0118,0xF3,  //DCLK
0x0119,0x01,
0x011A,0x00,
0x011B,0x00,
0x011C,0x00,
0x011D,0x00,
0x011E,0x00,
0x011F,0x03,
0x0012,0x01,

0x0122,0xFD,   //sysref
0x0123,0x00,        
0x0124,0x01,        
0x0125,0x00,
0x0126,0x00,
0x0127,0x00,
0x0128,0x00,
0x0129,0x00,
0x012A,0x10,   

0x012C,0xF3,  //DCLK
0x012D,0x01,
0x012E,0x00,
0x012F,0x00,
0x0130,0x00,
0x0131,0x00,
0x0132,0x00,
0x0133,0x03,
0x0134,0x01,

0x0136,0xFD,   //sysref
0x0137,0x00,        
0x0138,0x01,        
0x0139,0x00,
0x013A,0x00,
0x013B,0x00,
0x013C,0x00,
0x013D,0x00,
0x013E,0x10,   

0x0140,0xF3,  //DCLK
0x0141,0x01,
0x0142,0x00,
0x0143,0x00,
0x0144,0x00,
0x0145,0x00,
0x0146,0x00,
0x0147,0x03,
0x0148,0x01, 

0x014A,0xF3,  //DCLK
0x014B,0x01,
0x014C,0x00,
0x014D,0x00,
0x014E,0x00,
0x014F,0x00,
0x0150,0x00,
0x0151,0x03,
0x0152,0x01, 

delay100ms   
0001,0x02   
delay100ms  
0001,0x00   
delay100ms 
0001,0xE0   
delay100ms 
0001,0xE4   
delay100ms  
0003,0x13   
delay100ms   
0003,0x37   
delay100ms 
0003,0x17   

Parents Reply Children