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HMC7044 clock outputs phases status bit(rigister07D bit 2) doesn't be 1

Rigister x07D is 00010011. When I write 10000000 to x001, that is I send the reseed request, the rigister x07D becomes 00000001. The clock outputs phases status bit doesn't become 1. This causes that the delay of 204B link is variable everytime I power up(I think this reason resaults to this problem.

I will appreciate it greatly if everyone could help me to solve the problem.