• State Not Answered
  • Replies 1 reply
  • Subscribers 145 subscribers
  • Views 92 views
  • Users 0 members are here
Options
Related 

        

            Post
             Go back to editing
        

    

    


    

    









		











	
	
			
	
			
		
	
	
		

		
AD9258 CLOCK Generator



		

			

									
						bhavii
					
							

			
				
									
											
							 		
		        	            							
			
			    	
			                    
                
				                on Dec 16, 2021 
				
			
			
		


				
		

		    		    
		    
		    	
			
Hi,


I am using AD9528 clock module to generate a clock for the FPGA and ADRV.


The clock which i was able to generate was 2-SYSREF-120Khz and 2-DEVCLK-245.76MHz .


i also want to 100MHz clock output which i am not able to generate. I was able to get 100.53MHz clock but that would alter my other clock frequency's.


Setup file is also attached along with the picture.


Input i have given:


REFA:122.88MHZ.


REFB:0MHz


SYSREF:0MHz


CLK IN:122.88MHz




OUTPUT REQUIRED:


OUT1 : 120KHz.


OUT2 : 120KHz


OUT3 : 245.76MHz


OUT4 : 245.76MHZ


OUT5 : 100MHz


 




 


AD9528_setupfile.rar

								


				
				
		

			
						
									
									
						
						
			
			
			
			
		


					

			





	

		
	











	

	

					



			


				
	









	
    
	

  • 
	
    



	
		
	
	



    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							        
            
                                                                                                        
      
                            
    • 
                                 Analog Employees 
                                
                            
      • 
                        
     
                                                           			
			                            
                        
                on Dec 21, 2021 10:05 PM
            
            
					
    
	
    

		
		
    
					
    HI,
    

    you cannot generate all the outputs you list using the 122.88MHz VCXO because the minimum common multiple of the frequencies is 153.6GHz, outside the PLL2 VCO frequency range of 3.45GHz to 4.025GHz.
    

    You can generate all the frequencies but the 100MHz with the 122.88MHz VCXO. But you'll need to find another way to generate the 100MHz. I suggest using a 25MHz crystal resonator coupled to an AD9573 to obtain the 100MHz
    

    Petre
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
				
						
				
				
		
		
    
			
		
    
	
    

    

    •