• State Verified Answer
  • Replies 3 replies
  • Subscribers 142 subscribers
  • Views 386 views
  • Users 0 members are here
Options
Similar Content 

        

            Post
             Go back to editing
        

    

    


    

    









		











	
	
			
	
			
		
	
	
		

		
Question about AD9549 output clk frequency



		

			

									
						Se-woong
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Nov 24, 2021 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    Hello,
    

    

    My customer use AD9549 and ask some question about AD9549 output clk frequency in their below test result.
    

    

    They set AD9549 PLL output with S/R Devider x4, and then test below conditions.
    

    1) If source is 25MHz, output of AD9549 is exact 100MHz. (25x4 = 100)
    

    2) But if source is 49.952Mhz, output of AD9549 is 199.840MHz, not 199.808MHz. (49.953 x 4 = 199.808)
    

    

    Q1) Is above result correct? ( Source input is a 10 bit digitized signal.)
    

      
    

    Q2) Would you let me know whty this difference is occurred?
    

           Is this a PLL characteristic? conversion error? error from PPM? 
    

          or need to review schematic & configuration? device fault?
    

    

    Please advise me.
    

    

    Regards,
    

    Se-woong
    

    

    

     
    
								
    

				
				
		
    
			
						
									
									
						
						
			
			
			
			
		
    

					
    
			
    


    

	















    
	
    
	
    
					



			








	
	
	
	



Parents
	
      
	

    • 
	
      



	
		
	
	



      
	
      
		
      
							
					
      
		
      
			
													0
							
			
				
									
							        
			
			
			
      •    
      
            
			                            
                        
                on Nov 24, 2021 4:31 PM
            
            
					
      
	
      

		
		
      
					
      HI,
      

      in order to determine the AD9549 configuration, they must have used the AD9549 evaluation software. Please send me the stp file they created.
      

      Then I'll respond to your questions
      

      Petre
      
			
      

		
		
		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
						
				
						
				
				
		
		
      
			
		
      
	
      

      

      • 

	

    • 
	
      



	
		
	
	



      
	
      
		
      
							
					
      
		
      
			
													0
							
			
				
									
							        
			
			
			
        
            
			                            
                        
                on Dec 1, 2021 12:06 PM
            
            
												
						in reply to pminc48
					
									
        
	
        

		
		
        
					
        Dear Petre,
        

        

        Thank you for your kind concern.
        

        

        Please refer attached their STP file.
        

        ABLEE AD9549.zip
        

        Regards,
        

        Se-woong
        
			
        

		
		
		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
						
				
						
				
				
		
		
        
			
		
        
	
        

        

        • 

	

      • 
	
        



	
			
		
	



        
	
        
		
        
							
					
        
		
        
			
													+1
							
			
				
									
							        
			
			
			
        •    
        
            
			                            
                        
                on Dec 3, 2021 1:40 PM
            
            
												
						in reply to Se-woong
					
									
        
	
        

		
		
        
					
        Hi,
        

        I took an AD9549 evaluation board, I provided REFA=10.24MHz (from an AD9545 evaluation board, HSTL, 15 mA driver) and SYSCLK=25MHz (from a Rohde & Schwartz SMA 100A, 2dBm), I launched the evaluation software and I loaded the stp program you sent me. I then measured the OUT frequency with a Agilent E5052B as 24.479998 MHz.
        

        So the output was exactly the desired frequency.

        

        You say: "If source is 25MHz, output of AD9549 is exact 100MHz. (25x4 = 100)"
        

        When you say source, I suppose you refer to REFA, so if I set the feedback divider to 4, I would get a 100MHz. I changed accordingly the setup and save it. I then powered down the board and closed the evaluation software. I then powered back the board (this time I provided 25MHz at REFA from the AD9545 evaluation board, HSTL, 15 mA driver), launched the evaluation software and loaded the setup. I measured 99.999988 MHz, which I believe is very good.
        

        I then repeated the procedure for REFA=49.952MHz. I obtained 199.807976MHz, which I consider very close to the targeted 199.8080000000010 MHz indicated by the evaluation software.
        

        I suppose the error you get if from the clock source which you say is digital on 10 bits. I recommend measuring the 49.952MHz clock to see if the frequency is the one desired.
        

        I attach the stp files I used for REFA=25MHz and REFA=49.952MHz.
        

        AD9549_setup_REFA_25M_49p952M.zip
        

        Petre
        
			
        

		
		
		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
				
						
						
				
				
		
		
        
			
		
        
	
        

        

        • 

	
      



Reply

        


      • 
	
        



	
			
		
	



        
	
        
		
        
							
					
        
		
        
			
													+1
							
			
				
									
							        
			
			
			
        •    
        
            
			                            
                        
                on Dec 3, 2021 1:40 PM
            
            
												
						in reply to Se-woong
					
									
        
	
        

		
		
        
					
        Hi,
        

        I took an AD9549 evaluation board, I provided REFA=10.24MHz (from an AD9545 evaluation board, HSTL, 15 mA driver) and SYSCLK=25MHz (from a Rohde & Schwartz SMA 100A, 2dBm), I launched the evaluation software and I loaded the stp program you sent me. I then measured the OUT frequency with a Agilent E5052B as 24.479998 MHz.
        

        So the output was exactly the desired frequency.

        

        You say: "If source is 25MHz, output of AD9549 is exact 100MHz. (25x4 = 100)"
        

        When you say source, I suppose you refer to REFA, so if I set the feedback divider to 4, I would get a 100MHz. I changed accordingly the setup and save it. I then powered down the board and closed the evaluation software. I then powered back the board (this time I provided 25MHz at REFA from the AD9545 evaluation board, HSTL, 15 mA driver), launched the evaluation software and loaded the setup. I measured 99.999988 MHz, which I believe is very good.
        

        I then repeated the procedure for REFA=49.952MHz. I obtained 199.807976MHz, which I consider very close to the targeted 199.8080000000010 MHz indicated by the evaluation software.
        

        I suppose the error you get if from the clock source which you say is digital on 10 bits. I recommend measuring the 49.952MHz clock to see if the frequency is the one desired.
        

        I attach the stp files I used for REFA=25MHz and REFA=49.952MHz.
        

        AD9549_setup_REFA_25M_49p952M.zip
        

        Petre
        
			
        

		
		
		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
				
						
						
				
				
		
		
        
			
		
        
	
        

        

        • 


      


Children
	
      No Data