Some questions as below.
- Below figure is captured from AD9545 datasheet. Which Mx pin function should be set for 1 PPS input?
- If OCXO is connected to REFBB, we can enable AuxDPLL compensation for DPLLx, AuxNCOx, and TDCs? All component can stabilize by OCXO? How to select bandwidth value?
- 8273.2 needs 0.05-0.1Hz loss-pass filter, does this setting at DPLL profile x loop bandwidth?
- Base on cso file you provide to us, DPLL1 will synchronize to DPLL0. Do we need to change loop bandwidth in profile1.0?
- If ptp packet lost then we need OCXO to stable output clock, does this function done by item 2
Attachment is revised cso file. SYS IN can use crystal (52MHz) or OCXO(30.72MHz) through BOM select.