A low jitter(≤100fs) clock generator or PLL ,i need

In my project,

1)ADC is AD9208

2)sample clock=3GHz

3) external refclk is 10MHz

4)use a PLL/CLOCK to generate the sample clock

5)Fin=2.1GHz,SNR=54.19dBFS

6)to implement SNR performance,i use Virtual Eval Tool - BETA ,the external min jitter is 100fs.

so,help me choose a low jitter pll/clock to implement SNR performance

and,if i choose ADF4351,can it do that?If cannot, recommend some other PLL/CLOCK