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LTC6954 Clk-Input: Inverting LVDS Signals for Efficient PCB Layout

I use a 200 MHz oscillator with an LVDS output for the input clock of the LTC6954. For efficient PCB layout, I would prefer to invert the LVDS signals (LVDS_P goes to In-, LVDS_N to In+).

Is this possbile or may it lead to a degradation of the jitter performance?

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