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AD9515 Clock Input general questions

Hello,

I have to use the clock distributor AD9515 in my design to generate a 250MHz clock, and since it's pretty new to me, I'm not sure what clock input I should use ? 
A simple quartz, another clk generator IC that I will put upstream ... ?

And also, what is the differences between using a 1GHz quartz with a x4 divider or a 250MHz quartz with x1 div ?

Thanks 

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  • Hi,

    in the future, you should post questions related to clocking ICs in the Clock and Timing section of Engineer Zone:https://ez.analog.com/clock_and_timing

    As you said, the AD9515 is a clock distributor chip. It needs a clock at the input. It does not create it.

    If you want to create a clock of a higher frequency from a crystal resonator, take a look at the AD9576. It can take a 25 MHz crystal resonator and obtain many 250MHz clocks.

    Other smaller chips that can also generate 250MHz from a 25 MHz crystal resonator: HMC1035, HMC1033, HMC1031

    This page provides a comprehensive list: https://www.analog.com/en/products/clock-and-timing/clock-generation-distribution.html

    Regarding to your last question: whenever you introduce an IC between an input clock and an output clock, noise is introduced. The phase noise of the output clock depends on the input clock profile and the penalty the particular IC introduces. So there is not a clear answer to your question 

    Petre

Reply
  • Hi,

    in the future, you should post questions related to clocking ICs in the Clock and Timing section of Engineer Zone:https://ez.analog.com/clock_and_timing

    As you said, the AD9515 is a clock distributor chip. It needs a clock at the input. It does not create it.

    If you want to create a clock of a higher frequency from a crystal resonator, take a look at the AD9576. It can take a 25 MHz crystal resonator and obtain many 250MHz clocks.

    Other smaller chips that can also generate 250MHz from a 25 MHz crystal resonator: HMC1035, HMC1033, HMC1031

    This page provides a comprehensive list: https://www.analog.com/en/products/clock-and-timing/clock-generation-distribution.html

    Regarding to your last question: whenever you introduce an IC between an input clock and an output clock, noise is introduced. The phase noise of the output clock depends on the input clock profile and the penalty the particular IC introduces. So there is not a clear answer to your question 

    Petre

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