I want to implement multiLTC6952 stages.
The system will be composed by one master stage LTC6952 locked on an external 10MHz.
The master stage provides 5 outputs pair (REF clock - 100MHz & SSRQ PASS THRU) to synchronize 5 systems.
I want to know if I can do it because Analog devices examples implement only one VCO stage and multi clock distribution stages.
In my design, I must use a VCO in each stage :
1/ Stage 1 : VCO 1GHz locked on an external 10MHz
This stage provide a reference clock at 100MHz (low frequency reference because the 2° stage is at 1m)
2/ Stage 2 : VCO 4GHz locked on a 100MHz reference clock provided by the master LTC6952.
This stage provide JESD204B clocks
Jitter impact ?